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 PBSS302PD
40 V, 4 A PNP low VCEsat (BISS) transistor
Rev. 02 -- 6 December 2007 Product data sheet
1. Product profile
1.1 General description
PNP low VCEsat Breakthrough In Small Signal (BISS) transistor in a SOT457 (SC-74) small Surface-Mounted Device (SMD) plastic package. NPN complement: PBSS302ND.
1.2 Features
I I I I I Ultra low collector-emitter saturation voltage VCEsat 4 A continuous collector current capability IC Up to 15 A peak current Very low collector-emitter saturation resistance High efficiency due to less heat generation
1.3 Applications
I I I I I I Power management functions Charging circuits DC-to-DC conversion MOSFET gate driving Power switches (e.g. motors, fans) Thin Film Transistor (TFT) backlight inverter
1.4 Quick reference data
Table 1. Symbol VCEO IC ICM RCEsat
[1] [2]
Quick reference data Parameter collector-emitter voltage collector current peak collector current collector-emitter saturation resistance single pulse; tp 1 ms IC = -6 A; IB = -600 mA
[2]
Conditions open base
[1]
Min -
Typ 55
Max -40 -4 -15 75
Unit V A A m
Device mounted on a ceramic Printed-Circuit Board (PCB), Al2O3, standard footprint. Pulse test: tp 300 s; 0.02.
NXP Semiconductors
PBSS302PD
40 V, 4 A PNP low VCEsat (BISS) transistor
2. Pinning information
Table 2. Pin 1 2 3 4 5 6 Pinning Description collector collector base emitter collector collector
1 2 3 6 5 4 3 4
sym030
Simplified outline
Symbol
1, 2, 5, 6
3. Ordering information
Table 3. Ordering information Package Name PBSS302PD SC-74 Description plastic surface-mounted package (TSOP6); 6 leads Version SOT457 Type number
4. Marking
Table 4. Marking codes Marking code C9 Type number PBSS302PD
5. Limiting values
Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol VCBO VCEO VEBO IC ICM IB IBM Ptot Parameter collector-base voltage collector-emitter voltage emitter-base voltage collector current peak collector current base current peak base current total power dissipation single pulse; tp 1 ms Tamb 25 C
[2] [3] [4] [1] [2][5]
Conditions open emitter open base open collector
[1]
Min -
Max -40 -40 -5 -4 -15 -0.8 -2 360 600 750 1.1 2.5
Unit V V V A A A A mW mW mW W W
single pulse; tp 1 ms
PBSS302PD_2
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 02 -- 6 December 2007
2 of 14
NXP Semiconductors
PBSS302PD
40 V, 4 A PNP low VCEsat (BISS) transistor
Table 5. Limiting values ...continued In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Tj Tamb Tstg
[1] [2] [3] [4] [5]
Parameter junction temperature ambient temperature storage temperature
Conditions
Min -65 -65
Max 150 +150 +150
Unit C C C
Device mounted on a ceramic PCB, Al2O3, standard footprint. Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2. Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 6 cm2. Operated under pulsed conditions: duty cycle 10 % and pulse width tp 10 ms.
1600 Ptot (mW) 1200
(1)
006aaa270
800
(2) (3)
400
(4)
0 -75
-25
25
75
125 175 Tamb (C)
(1) Ceramic PCB, Al2O3, standard footprint (2) FR4 PCB, mounting pad for collector 6 cm2 (3) FR4 PCB, mounting pad for collector 1 cm2 (4) FR4 PCB, standard footprint
Fig 1. Power derating curves
PBSS302PD_2
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 02 -- 6 December 2007
3 of 14
NXP Semiconductors
PBSS302PD
40 V, 4 A PNP low VCEsat (BISS) transistor
6. Thermal characteristics
Table 6. Symbol Rth(j-a) Thermal characteristics Parameter thermal resistance from junction to ambient Conditions in free air
[1] [2] [3] [4] [1][5]
Min -
Typ -
Max 350 208 167 113 50 45
Unit K/W K/W K/W K/W K/W K/W
Rth(j-sp)
[1] [2] [3] [4] [5]
thermal resistance from junction to solder point
Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2. Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 6 cm2. Device mounted on a ceramic PCB, Al2O3, standard footprint. Operated under pulsed conditions: duty cycle 10 % and pulse width tp 10 ms.
103 Zth(j-a) (K/W) 102 duty cycle = 1 0.75 0.5 0.33 0.2 0.1 0.05 10 0.02 0.01 1
006aaa271
0
10-1 10-5
10-4
10-3
10-2
10-1
1
10
102 tp (s)
103
FR4 PCB, standard footprint
Fig 2. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
PBSS302PD_2
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 02 -- 6 December 2007
4 of 14
NXP Semiconductors
PBSS302PD
40 V, 4 A PNP low VCEsat (BISS) transistor
103 Zth(j-a) (K/W) 102 duty cycle = 1 0.75 0.5 0.33 0.2 0.1 10 0.05 0.02 0.01 1 0 10-1 10-5
006aaa272
10-4
10-3
10-2
10-1
1
10
102 tp (s)
103
FR4 PCB, mounting pad for collector 1 cm2
Fig 3. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
103 Zth(j-a) (K/W) 102
006aaa273
duty cycle = 1 0.75 0.5 0.33 0.2 0.1 0.05 0.02 0.01
10
1 0
10-1 10-5
10-4
10-3
10-2
10-1
1
10
102 tp (s)
103
FR4 PCB, mounting pad for collector 6 cm2
Fig 4. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
PBSS302PD_2
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 02 -- 6 December 2007
5 of 14
NXP Semiconductors
PBSS302PD
40 V, 4 A PNP low VCEsat (BISS) transistor
7. Characteristics
Table 7. Characteristics Tamb = 25 C unless otherwise specified. Symbol Parameter ICBO Conditions Min 200
[1] [1] [1] [1]
Typ -46 -70 -120 -220 -320 55 -0.8 -0.84 -0.84 -1.0 -0.8 12 43 55 241 80 321 110 50
Max -0.1 -50 -0.1 -0.1 -60 -110 -180 -300 -450 75 -0.85 -0.9 -1 -1.1 -1.0 -
Unit A A A A
collector-base cut-off VCB = -30 V; IE = 0 A current VCB = -30 V; IE = 0 A; Tj = 150 C collector-emitter cut-off current emitter-base cut-off current DC current gain VCE = -30 V; VBE = 0 V VEB = -5 V; IC = 0 A VCE = -2 V; IC = -0.5 A VCE = -2 V; IC = -1 A VCE = -2 V; IC = -2 A VCE = -2 V; IC = -4 A VCE = -2 V; IC = -6 A
ICES IEBO hFE
200 175 80 30 -
VCEsat
collector-emitter saturation voltage
IC = -0.5 A; IB = -50 mA IC = -1 A; IB = -50 mA IC = -2 A; IB = -200 mA IC = -4 A; IB = -400 mA IC = -6 A; IB = -600 mA
[1] [1] [1]
mV mV mV mV mV m V V V V V ns ns ns ns ns ns MHz pF
-
RCEsat VBEsat
collector-emitter IC = -6 A; IB = -600 mA saturation resistance base-emitter saturation voltage IC = -0.5 A; IB = -50 mA IC = -1 A; IB = -50 mA IC = -1 A; IB = -100 mA IC = -4 A; IB = -400 mA
[1] [1]
-
VBEon td tr ton ts tf toff fT Cc
[1]
base-emitter turn-on VCE = -2 V; IC = -2 A voltage delay time rise time turn-on time storage time fall time turn-off time transition frequency VCE = -10 V; IC = -0.1 A; f = 100 MHz VCC = -10 V; IC = -2 A; IBon = -0.1 A; IBoff = 0.1 A
-
collector capacitance VCB = -10 V; IE = ie = 0 A; f = 1 MHz
Pulse test: tp 300 s; 0.02.
PBSS302PD_2
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 02 -- 6 December 2007
6 of 14
NXP Semiconductors
PBSS302PD
40 V, 4 A PNP low VCEsat (BISS) transistor
600 hFE
(1)
006aaa282
-12 IC (A) -8
006aaa288
400
(2)
IB (mA) = -400 -360 -320 -280 -240 -200 -160 -120 -80 -40
200
(3)
-4
0 -10-1
-1
-10
-102
-103
-104 -105 IC (mA)
0 0
-0.4
-0.8
-1.2
-1.6 -2.0 VCE (V)
VCE = -2 V (1) Tamb = 100 C (2) Tamb = 25 C (3) Tamb = -55 C
Tamb = 25 C
Fig 5. DC current gain as a function of collector current; typical values
-1.6 VBE (V) -1.2
006aaa283
Fig 6. Collector current as a function of collector-emitter voltage; typical values
-1.3 VBEsat (V) -0.9
(1)
006aaa287
-0.8 -0.5 -0.4
(2) (3)
0 -10-1
-1
-10
-102
-103
-104 -105 IC (mA)
-0.1 -10-1
-1
-10
-102
-103
-104 -105 IC (mA)
VCE = -2 V; Tamb = 25 C
IC/IB = 20 (1) Tamb = -55 C (2) Tamb = 25 C (3) Tamb = 100 C
Fig 7. Base-emitter voltage as a function of collector current; typical values
Fig 8. Base-emitter saturation voltage as a function of collector current; typical values
PBSS302PD_2
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 02 -- 6 December 2007
7 of 14
NXP Semiconductors
PBSS302PD
40 V, 4 A PNP low VCEsat (BISS) transistor
-1 VCEsat (V)
(1)
006aaa284
-1 VCEsat (V)
006aaa285
-10-1
(2) (3)
-10-1
(1) (2)
-10-2
-10-2
(3)
-10-3 -10-1
-1
-10
-102
-103 -104 IC (mA)
-10-3 -10-1
-1
-10
-102
-103
-104 -105 IC (mA)
IC/IB = 20 (1) Tamb = 100 C (2) Tamb = 25 C (3) Tamb = -55 C
Tamb = 25 C (1) IC/IB = 100 (2) IC/IB = 50 (3) IC/IB = 10
Fig 9. Collector-emitter saturation voltage as a function of collector current; typical values
102 RCEsat () 10
006aaa289
Fig 10. Collector-emitter saturation voltage as a function of collector current; typical values
103 RCEsat () 102
(1)
006aaa327
10 1
(1) (2)
(2) (3)
1
10-1
(3)
10-1
10-2 -10-1
-1
-10
-102
-103 -104 IC (mA)
10-2 -10-1
-1
-10
-102
-103 -104 IC (A)
IC/IB = 20 (1) Tamb = 100 C (2) Tamb = 25 C (3) Tamb = -55 C
Tamb = 25 C (1) IC/IB = 100 (2) IC/IB = 50 (3) IC/IB = 10
Fig 11. Collector-emitter saturation resistance as a function of collector current; typical values
Fig 12. Collector-emitter saturation resistance as a function of collector current; typical values
PBSS302PD_2
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 02 -- 6 December 2007
8 of 14
NXP Semiconductors
PBSS302PD
40 V, 4 A PNP low VCEsat (BISS) transistor
8. Test information
-I B
90 % input pulse (idealized waveform)
-I Bon (100 %)
10 %
-I Boff
-I C
90 %
output pulse (idealized waveform)
-I C (100 %)
10 % t td t on tr ts t off tf
006aaa266
Fig 13. BISS transistor switching time definition
VBB VCC
RB (probe) oscilloscope 450 VI R1 R2
RC Vo (probe) 450 DUT oscilloscope
mgd624
VCC = -10 V; IC = -2 A; IBon = -0.1 A; IBoff = 0.1 A
Fig 14. Test circuit for switching times
PBSS302PD_2
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 02 -- 6 December 2007
9 of 14
NXP Semiconductors
PBSS302PD
40 V, 4 A PNP low VCEsat (BISS) transistor
9. Package outline
3.1 2.7 6 5 4 0.6 0.2 1.1 0.9
3.0 2.5
1.7 1.3
pin 1 index
1 0.95 1.9 Dimensions in mm
2
3 0.40 0.25 0.26 0.10 04-11-08
Fig 15. Package outline SOT457 (SC-74)
10. Packing information
Table 8. Packing methods The indicated -xxx are the last three digits of the 12NC ordering code.[1] Type number PBSS302PD Package SOT457 Description 4 mm pitch, 8 mm tape and reel; T1 4 mm pitch, 8 mm tape and reel; T2
[1] [2] [3]
[2] [3]
Packing quantity 3000 -115 -125 10000 -135 -165
For further information and the availability of packing methods, see Section 14. T1: normal taping T2: reverse taping
PBSS302PD_2
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 02 -- 6 December 2007
10 of 14
NXP Semiconductors
PBSS302PD
40 V, 4 A PNP low VCEsat (BISS) transistor
11. Soldering
3.45 1.95
solder lands 0.95 3.30 2.825 0.45 0.55 occupied area solder paste solder resist
1.60 1.70 3.10 3.20
msc422
Dimensions in mm
Fig 16. Reflow soldering footprint SOT457 (SC-74)
5.30
solder lands 5.05 0.45 1.45 4.45 solder resist occupied area
1.40 4.30
msc423
Dimensions in mm
Fig 17. Wave soldering footprint SOT457 (SC-74)
PBSS302PD_2
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 02 -- 6 December 2007
11 of 14
NXP Semiconductors
PBSS302PD
40 V, 4 A PNP low VCEsat (BISS) transistor
12. Revision history
Table 9. Revision history Release date 20071206 Data sheet status Product data sheet Change notice Supersedes PBSS302PD_1 Document ID PBSS302PD_2 Modifications:
* * * * * * * * * *
The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. Legal texts have been adapted to the new company name where appropriate. Section 1.1 "General description": amended Section 1.4 "Quick reference data": ICM conditions amended Figure 2, 3, 4 and 6: amended Table 5: ICM conditions amended Table 5: IBM conditions amended Table 6: typing error for maximum value on 6 cm2 footprint amended Section 11 "Soldering": added Section 13 "Legal information": updated Product data sheet -
PBSS302PD_1
20050418
PBSS302PD_2
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 02 -- 6 December 2007
12 of 14
NXP Semiconductors
PBSS302PD
40 V, 4 A PNP low VCEsat (BISS) transistor
13. Legal information
13.1 Data sheet status
Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet
[1] [2] [3]
Product status[3] Development Qualification Production
Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification.
Please consult the most recently issued document before initiating or completing a design. The term `short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.
13.2 Definitions
Draft -- The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet -- A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.
malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications -- Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values -- Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale -- NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license -- Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.
13.3 Disclaimers
General -- Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes -- NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use -- NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or
13.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners.
14. Contact information
For additional information, please visit: http://www.nxp.com For sales office addresses, send an email to: salesaddresses@nxp.com
PBSS302PD_2
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 02 -- 6 December 2007
13 of 14
NXP Semiconductors
PBSS302PD
40 V, 4 A PNP low VCEsat (BISS) transistor
15. Contents
1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 10 11 12 13 13.1 13.2 13.3 13.4 14 15 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description. . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data. . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Test information . . . . . . . . . . . . . . . . . . . . . . . . . 9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10 Packing information. . . . . . . . . . . . . . . . . . . . . 10 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 12 Legal information. . . . . . . . . . . . . . . . . . . . . . . 13 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Contact information. . . . . . . . . . . . . . . . . . . . . 13 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Please be aware that important notices concerning this document and the product(s) described herein, have been included in section `Legal information'.
(c) NXP B.V. 2007.
All rights reserved.
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 6 December 2007 Document identifier: PBSS302PD_2


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